The present invention relates to a socket which receives the edge of a chip carrier substrate, and more particularly to a socket for a single in-line memory module.
Edge connectors for printed circuit boards are well known. These are generally mounted to a mother board and employ card guides which direct a daughter board into contact with terminals in a dielectric housing. The terminals may lie in two rows and make independent contact with traces on opposite sides of a daughter card, as in U.S. Pat. No. 4,077,694, or may lie in a single row, each terminal having two arms for redundant contact on opposite sides of a board, as in U.S. Pat. No. 3,601,775. In any it is desirable to design the terminals and housings to preclude the possibility of bending the contact portion of a terminal beyond the elastic limit, which could affect the integrity of contact in future inserted boards.
The advance of semiconductor technology has resulted in development of chip carriers which comprise substrates on which the chips are mounted and electrically connected by fine wire leads. The substrates are plugged into sockets having resilient contact members which make conact with surface traces on the substrate. See, e.g., U.S. Pat. No. 3,753,211, which discloses a socket having terminals for contact with opposed edges. In some applications, as where board space is at a premium, it is desirable to connect the substrate on edge to the board. One such application is the use of edge mounted memory modules in the form of single in-line memory modules. Standard card edge connectors cannot be simply downsized to meet the requirements of a substrate to circuit board connection, known as the level two connection. This connection is relatively much smaller and requires simple, compact contacts on a much closer spacing. As such, variations in board thickness and board warpage are much more likely to deflect contact means beyond the elastic limit, which would adversely affect contact pressure and thus the integrity of the electrical connection of future substrate insertions.